Uses a set of optimizers that will compile to the proper gateset for the
device (xmon, sqrt_iswap, or sycamore gates) and then use optimizers to
compress the gate depth down as much as is easily algorithmically possible
by merging rotations, ejecting Z gates, etc.
Args
circuit
The circuit to optimize.
new_device
The device the optimized circuit should be targeted at. If
set to None, the circuit's current device is used.
qubit_map
Transforms the qubits (e.g. so that they are GridQubits).
optimizer_type
A string defining the optimizations to apply.
Possible values are 'xmon', 'xmon_partial_cz', 'sqrt_iswap',
'sycamore'
tolerance
The tolerance passed to the various circuit optimization
passes.
tabulation_resolution
If provided, compute a gateset tabulation
with the specified resolution and use it to approximately
compile arbitrary two-qubit gates for which an analytic compilation
is not known.